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The OMAP750 is a single chip that integrates a ARM926EJ-S™ core for application processing and TI’s GSM/GPRS digital baseband modem. The OMAP750 offers twice the application performance over the previous generation while doubling the standby time for handsets and smartphones. It is intended for high-volume wireless handset manufacturers and is not available through distributors. The OMAP750 includes all of the features of the OMAP73x devices while including a range of features that improve multimedia application performance. The single-chip OMAP750 integrates an ARM926 core dedicated to applications processing with a complete Class 12 GSM/GPRS modem baseband subsystem that consists of an ARM7 core with TI's low power TMS320C54x™ core. The OMAP750 incorporates faster memory options, including support of double data rate (DDR) memory that increases processing speed over the OMAP730, which only supported SDRAM. Improved throughput from an internal frame buffer also enhances processing of multimedia applications, including streaming video and high-end imaging functions. The OMAP750 provides strong security safeguards, as its hardwarebased measures offer a higher degree of protection over software-only features. A secure bootloader, secure memory (ROM and RAM), and random number generators are included. Security hardware accelerators also address popular security standards like MD5/SHA1 and DES/3DES. The OMAP733 processor is an integral part of the TCS2630 GPRS chipset solution. OMAP733 Features: - Improved multimedia and application performance
- Class 12 GSM/GPRS modem baseband and ARM926 core for applications processing
- Increased processing speeds through DDR memory option and internal frame buffer
- Security protection through hardware-based security platform
- Extended list of peripherals, including parallel OCP camera interface for high resolution imaging
- GPS, WLAN and Bluetooth® capable
- 2.0 megapixel camera
- Pin-to pin compatible with OMAP730
Low-Power, High-Performance CMOS Technology - Low-voltage 130 nm technology
- 1.1 - 1.5V cores, 1.8 - 2.75V IO
- Extremely low power consumption: less than 10 uA in standby mode
- Split power supplies for application processing, digital baseband and real-time clock enable precise control over power consumption
- Optimized clocking and power management: Only two clocks required at 13 MHz and 32 kHz
ARM926TEJ Core Subsystem - ARM926EJ-S V5 architecture up to 200 MHz (maximum frequency)
- 16 kB I-cache; 8 kB D-cache
- Java acceleration in hardware
- Multimedia instruction set architecture (ISA) extension
GSM/GPRS Digital Baseband Subsystem - Class 12 GPRS ROM-based DBB
- E-GPRS interface for EDGE co-processor
- 384 K-bytes internal SRAM
- E-OTD and TTY support
- Quad vocoder with EFR, FR, HR, AMR
- GSM ultra-low power device (ULPD)
- SIM interface
Application Subsystem - Supports all leading operating systems
- DMA with 4 physical and 17 logical channels and a dedicated 2D graphics engine
- Programmable GPIO keyboard interface
- 54-Mbps WLAN interface
- Security acceleration in hardware:
- Secure bootloader
- 48 kB of secure ROM
- 16 kB of secure RAM
- Hardware acceleration for security standards and random number generator
- Unique die ID cell
- Third-party Security software library
- Enhanced audio controller (EAC)
- Comprehensive memory controller for interfaces to:
- 128 MB of mobile SDRAM
- 256 MB Flash
- NAND Flash controllers
- 1.6 Mb ISRAM
- SD/MMC/SDIO interface
- Enhanced Trace Module for debug
- LCD controller
- uWire
- SPI
- 1-wire and HDQ interface
- Bluetooth data/audio interface
- USB On-the-Go
- Two high-speed 3.68 MHz UARTs
- Fast IrDA (FIR)
- Two 32-bit timers
- Parallel camera port
- Programmable three-color LED pulse generation
- I²C master/slave controller
- SmartCard interface
289-ball, 12 mm x 12 mm MicroStar BGA™ Package
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