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The OMAP310 processor is a power-efficient, TI-enhanced ARM925 application processor that targets cost-sensitive 2.5G and 3G handsets and PDAs. It is intended for high-volume wireless handset manufacturers and is not available through distributors. OMAP310 Features: Low-Power, High-Performance CMOS Technology - Low-voltage 130 nm technology
TI925T ARM9TDMI Core - Up to 144 MHz (maximum frequency)
Voltage: 1.5v nominal - 16KB I-cache; 8KB D-cache
- Support for 32-bit and 16-bit (Thumb mode) instruction sets
- Data and program MMUs
- Two 64-entry translation look-aside buffers (TLBs) for MMUs
- 17-word write buffer
192-KB of shared internal SRAM - frame buffer Memory Traffic Controller (TC) - 16-bit EMIFS external memory interface
- 16-bit EMIFF external memory interface
9-Channel System DMA Controller Digital Phase-Locked Loop (DPLL) for MPU/DSP/TC Clocking Control IEEE Standard 1149.1 (JTAG) Boundary Scan Logic Application Subsystem - Supports all major operating systems
- Three 32-bit timers and watchdog timer
- 32-kHz timer
- Level1/Level2 interrupt handlers
- USB1.1 host interface with up to 3 ports
- USB1.1 function interface
- One integrated USB transceiver for either host or function
- Multichannel buffered serial port (McBSP)
- I²C master and slave interface
- Micro-wure serial interface
- MMC/SD interface
- HDQ/1-wire interface
- Camera interface for CMOS sensors
- ETM9 trace module for TI925T debug
- Keyboard matrix interface (6 x 5 or 8 x 8)
- Up to 10 MPU general-purpose I/Os
- Pulse-width tone (PWT) interface
- Pulse-width light (PWL) interface
- Two LED pulse generators
- Real-time clock
- LCD controller with dedicated system DMA channel
- Two multichannel buffered serial ports
- Two multichannel serial interfaces
- Three UARTs (one supporting SIR mode for IrDA)
- Four interprocessor mailboxes
- Up to 14 shared general-purpose I/Os
289-ball, 12 mm x 12 mm MicroStar BGA™ Package
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